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This project implements a real-time ECG signal processing and heart rate detection system on an STM32L432 microcontroller using FreeRTOS. Raw ECG samples are filtered at 500 Hz, R-peaks are detected using triangle-template matching, and heart rate is computed in BPM. The system outputs a buzzer “heartbeat” on each detected beat and displays BPM on a 7-segment display over UART.
The design follows the EE152 signal-processing pipeline and is structured as a small real-time system with separate tasks for sampling/processing, status, audio output, and display updates.
Hardware Setup
- ECG analog input on PA0 (A0)
- Debug/canned ECG output on DAC PA4 (A3) and debug output on DAC PA5 (A4)
- 7-segment LCD driven via UART TX on PA9 (D1)
- Piezo buzzer output on PA12 (D2)
- R-peak digital pulse output on D6 for timing/verification
Software Architecture
- FreeRTOS multi-task scheduling
- Main processing loop handles sampling + filtering + peak detection
- Separate tasks for status LED, buzzer output, and BPM/LCD updates
Signal Processing Pipeline
- ADC → 60 Hz notch (biquad IIR) → 5 Hz high-pass → triangle template → 35 Hz low-pass → moving stats → adaptive threshold → R-peak detection
- Adaptive threshold computed using ~2-second moving statistics
- Lockout (refractory period) to prevent double-counting closely spaced peaks
Timing & Verification
- Real-time operation at 500 Hz sampling rate
- Debug DAC output enables visualizing intermediate stages of the pipeline
- R-peak digital pulse provides a clean verification signal for detection timing
ECG Heartrate Monitor
Real-time ECG heart rate monitoring system on STM32L432 using C and FreeRTOS, implementing a digital signal processing pipeline to compute live BPM.
CFreeRTOSDACDSPSTM32UARTADC
Key Highlights
- • Developed a real-time ECG heart rate monitoring system on an STM32L432 using C and FreeRTOS, implementing 500 Hz signal sampling, multi-task scheduling, UART display output, buzzer feedback, and DAC-based debugging
- • Designed and optimized a digital signal processing pipeline with 60 Hz notch filtering, 5 Hz high-pass filtering, and adaptive thresholding
- • Implemented triangle-template R-peak detection and lockout protection to compute live BPM from ECG signals
Project Details
This project implements a real-time ECG signal processing and heart rate detection system on an STM32L432 microcontroller using FreeRTOS. Raw ECG samples are filtered at 500 Hz, R-peaks are detected using triangle-template matching, and heart rate is computed in BPM. The system outputs a buzzer “heartbeat” on each detected beat and displays BPM on a 7-segment display over UART.
The design follows the EE152 signal-processing pipeline and is structured as a small real-time system with separate tasks for sampling/processing, status, audio output, and display updates.
Hardware Setup
- ECG analog input on PA0 (A0)
- Debug/canned ECG output on DAC PA4 (A3) and debug output on DAC PA5 (A4)
- 7-segment LCD driven via UART TX on PA9 (D1)
- Piezo buzzer output on PA12 (D2)
- R-peak digital pulse output on D6 for timing/verification
Software Architecture
- FreeRTOS multi-task scheduling
- Main processing loop handles sampling + filtering + peak detection
- Separate tasks for status LED, buzzer output, and BPM/LCD updates
Signal Processing Pipeline
- ADC → 60 Hz notch (biquad IIR) → 5 Hz high-pass → triangle template → 35 Hz low-pass → moving stats → adaptive threshold → R-peak detection
- Adaptive threshold computed using ~2-second moving statistics
- Lockout (refractory period) to prevent double-counting closely spaced peaks
Timing & Verification
- Real-time operation at 500 Hz sampling rate
- Debug DAC output enables visualizing intermediate stages of the pipeline
- R-peak digital pulse provides a clean verification signal for detection timing